Design and evaluation of a hardware/software FPGA-based system for fast image processing

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dc.contributor.author Kalomiros, J. A.
dc.contributor.author Lygouras, J.
dc.date.accessioned 2015-06-25T14:21:59Z
dc.date.available 2015-06-25T14:21:59Z
dc.date.issued 2008-03
dc.identifier.issn 0141-9331
dc.identifier.other http://www.sciencedirect.com/science/article/pii/S014193310700110X el
dc.identifier.uri http://apothesis.teicm.gr/xmlui/handle/123456789/1500
dc.description.abstract We evaluate the performance of a hardware/software architecture designed to perform a wide range of fast image processing tasks. The system architecture is based on hardware featuring a Field Programmable Gate Array (FPGA) co-processor and a host computer. A LabVIEW™ host application controlling a frame grabber and an industrial camera is used to capture and exchange video data with the hardware co-processor via a high speed USB2.0 channel, implemented with a standard macrocell. The FPGA accelerator is based on a Altera Cyclone II chip and is designed as a system-on-a-programmable-chip (SOPC) with the help of an embedded Nios II software processor. The SOPC system integrates the CPU, external and on chip memory, the communication channel and typical image filters appropriate for the evaluation of the system performance. Measured transfer rates over the communication channel and processing times for the implemented hardware/software logic are presented for various frame sizes. A comparison with other solutions is given and a range of applications is also discussed. en
dc.format.extent 12 el
dc.language.iso en el
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 Διεθνές *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/4.0/ *
dc.title Design and evaluation of a hardware/software FPGA-based system for fast image processing en
dc.type Άρθρο σε επιστημονικό περιοδικό el
dc.identifier.doi 10.1016/j.micpro.2007.09.001
dc.publication.category Απαγόρευση δημοσίευσης - Βιβλιογραφική αναφορά el
dc.relation.journal Microprocessors and Microsystems;Vol. 32, Iss. 2
dc.subject.keyword Hardware/software co-design el
dc.subject.keyword Image processing el
dc.subject.keyword FPGA el
dc.subject.keyword Embedded processor el


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Attribution-NonCommercial-NoDerivatives 4.0 Διεθνές Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivatives 4.0 Διεθνές